A thesis submitted in partial fulfillment of the requirements for the degree of Master of Engineering, School of Advanced Technologies

Thesis (M.Eng.) - Asian Institute of Technology, 2002

Analog IC design for contactless smartcard concerns the design of the RF front-end for contactless smartcard. It focuses on designing an analog core to extract power, data and clock signal from RF signal, which is transmitted from the reader. This means the contactless smartcard do not require a battery to operate. The extracted data will be processed by the digital circuit in the card. In addition, the design allows the data from the digital circuit to be transmitted back to the reader. To accomplish the tasks, the core consists of eight important design blocks. They are limiter, rectifier, bandgap reference, shunt regulator, isolator, clock recovery, receiver and transmitter. For completeness of the RF front-end design, antenna design is also included in the study. The designed smartcard is compatible with the ISO 14443 standard. The core is built on 0.35um CMOS technology by Cadence Analog Design Environment IC4.46. The design starts from schematic level to the layout level. The simulation results are satisfied. This study covers only the analog design of the contactless smartcard. Firstly, it introduces the concepts of contactless smartcard and its specifications and requirements. Before designing a circuit, it provides further background of each of the design block. Then the design is explained in details. The results of each design will be discussed. Finally conclusion and recommendations will be shown.