TY  - SER
AU  - Nyein Chan Win Naing
AU  - Attaphongse Taparugssanagorn,
AU  - Adisorn Lertsinsrubtavee,
AU  - Chantri Polprasert,
AU  - Chaklam Silpasuwanchai,
TI  - Design and implementation of a LoRa mesh network with an optimized routing protocol
T2  - Internship Report
PY  - 2025///
CY  - Pathum Thani, Thailand
PB  - Asian Institute of Technology
KW  - Computer networks
KW  - Computer Communication Networks
KW  - Wireless communication systems
N1  - An Internship Study submitted in partial fulfillment of the requirements for the degree of Master of Science in Computer Science; Internship Report (M. Sc.) - Asian Institute of Technology, 2025
N2  - Low-Power Wide-Area Networks using standard LoRaWAN struggle with coverage gaps due  to single-hop topology limitations. While mesh networking addresses this through multi-hop  relay, existing LoRa mesh protocols face scalability barriers from broadcast-based routing and fixed-interval control overhead. Flooding protocols create exponential tra!c violating duty cycle constraints, while table-driven protocols waste airtime with unnecessary periodic control  packets regardless of network stability. This research implements a gateway-aware cost routing protocol combining three mechanisms:  (1) Trickle adaptive scheduling reducing HELLO overhead through exponential backo" and  redundancy suppression, (2) multi-metric cost function integrating signal quality and gateway  load for path selection, and (3) proactive fault detection with safety mechanisms preventing  over-suppression while enabling rapid convergence.The research makes six novel contributions: (1) first complete Trickle adaptive scheduler integrated with LoRaMesher firmware achieving 85-90% suppression e!ciency, (2) discovery  that Trickle operates as local per-node decisions rather than network-wide cascades, limiting  fault impact regionally, (3) zero-overhead ETX tracking via sequence-gap detection eliminating  ACKoverhead, (4) active gateway load sharing with real-time load encoding enabling dynamic traffic distribution, (5) safety HELLO mechanism preventing over-suppression while enabling rapid fault detection, and (6) proactive health monitoring reducing fault detection time versus library baseline.Hardware validation on ESP32-S3 nodes demonstrates approximately 30% HELLO overhead  reduction, 96-100% packet delivery ratio in indoor scenarios, and successful dual-gateway load distribution. Multi-hop routing capability is validated with relay nodes forwarding traffic and cost-based routing selecting quality-aware paths unavailable in hop-count protocols. The adaptive overhead reduction and fault-tolerant design enable scalable LoRa mesh deploy ments for resource-constrained applications including agricultural monitoring, industrial IoT,  and environmental sensing requiring duty cycle compliance and network resilience. The local fault isolation discovery and zero-overhead ETX tracking represent fundamental contributions  to LPWAN mesh protocol research
UR  - http://203.159.5.9/ait-thesis/Viewer/viewer.php?id=B23606
ER  -