02194nam a2200409 4500 20260818090226.0 080998 th eng .b11494177 AIT Thesis no. CS-95-24 Chen, Peng A design of array multiplier Bangkok : Asian Institute of Technology, 1995 38 leaves + 1 online resource Thesis ; no. CS-95-24 A thesis submitted in partial fulfilment of the requirement for the degree of Master of Science Thesis (M.Sc.) - Asian Institute of Technology, 1995 In this thesis, a new design technique, 3n-2m scheme, for array multipliers is presented. Its efficiency and flexibility are analyzed. Comparison with existing designs is discussed. The author also provides its application to some existing array multiplier technique for faster speed. The design to combine multiplication with addition is implemented on the basis of existing multiplier technique and new proposed 3n-2m scheme. Multiplication Yulu, Qi, Chairperson Murai, Shunji, Examination committee Huynh, Ngoc Phien, Examination Committee SEC, Scholarship donor Asian Institute of Technology. Thesis ; no. CS-95-24 Full-Text http://203.159.5.9/ait-thesis/detail.php?q=B15030 .b11494177 mnait v 240404 0 960624 m a v 2 mnait mnait mnarc 20 40 Barcode : 30050120675557 CREATED : 1996-05-21 RECORD # : i1175784x LPATRON : 0 LCHKIN : - # RENEWALS : 0 # OVERDUE : 0 IUSE3 : 0 TOT CHKOUT : 0 TOT RENEW : 0 Barcode : 30050120675540 CREATED : 1996-05-21 RECORD # : i11757851 LPATRON : 0 LCHKIN : - # RENEWALS : 0 # OVERDUE : 0 IUSE3 : 0 TOT CHKOUT : 0 TOT RENEW : 0 Barcode : 30050120356174 CREATED : 2016-06-14 RECORD # : i13036026 LPATRON : 0 LCHKIN : - # RENEWALS : 0 # OVERDUE : 0 IUSE3 : 0 TOT CHKOUT : 0 TOT RENEW : 0 27303 27303 0 0 0 0 MAIN MAIN mnait 2026-08-18 30.00 0 AIT Thesis no. CS-95-24 30050120675557 2026-08-18 09:02:26 1 2026-08-18 20 0 0 0 0 MAIN MAIN mnait 2026-08-18 30.00 0 AIT Thesis no. CS-95-24 30050120675540 2026-08-18 09:02:26 2 2026-08-18 20 0 0 0 0 MAIN MAIN mnarc 2026-08-18 0 AIT Thesis no. CS-95-24 30050120356174 2026-08-18 09:02:26 2026-08-18 40