TY  - BOOK
AU  - Chen,Peng
AU  - Yulu,Qi
AU  - Murai,Shunji
AU  - Huynh,Ngoc Phien
ED  - SEC,
TI  - A design of array multiplier
T2  - Thesis
PY  - 1995///
CY  - Bangkok
PB  - Asian Institute of Technology
KW  - Multiplication
N1  - A thesis submitted in partial fulfilment of the requirement for the degree of Master of Science; Thesis (M.Sc.) - Asian Institute of Technology, 1995
N2  - In this thesis, a new design technique, 3n-2m scheme, for array multipliers is presented. Its efficiency and flexibility are analyzed. Comparison with existing designs is discussed. The author also provides its application to some existing array multiplier technique for faster speed. The design to combine multiplication with addition is implemented on the basis of existing multiplier technique and new proposed 3n-2m scheme
UR  - http://203.159.5.9/ait-thesis/detail.php?q=B15030
ER  -