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  <titleInfo>
    <title>Fuzzy processor for a flying robot controller</title>
  </titleInfo>
  <name type="personal">
    <namePart>Krisana Donpraikum</namePart>
    <role>
      <roleTerm authority="marcrelator" type="text">creator</roleTerm>
    </role>
  </name>
  <name type="personal">
    <namePart>Manukid Parnichkun</namePart>
    <role>
      <roleTerm type="text">Examination Committee</roleTerm>
    </role>
  </name>
  <name type="personal">
    <namePart>Pavan Siamchai</namePart>
    <role>
      <roleTerm type="text">Examination committee</roleTerm>
    </role>
  </name>
  <name type="personal">
    <namePart>Lertsak Lekawat</namePart>
    <role>
      <roleTerm type="text">Chairperson</roleTerm>
    </role>
  </name>
  <name type="corporate">
    <namePart>National Electronics and Computer Technology Center (NECTEC)</namePart>
    <role>
      <roleTerm type="text">Scholarship donor</roleTerm>
    </role>
  </name>
  <typeOfResource>text</typeOfResource>
  <genre authority="marc">series</genre>
  <genre authority="marc">technical report</genre>
  <originInfo>
    <place>
      <placeTerm type="code" authority="marccountry">th</placeTerm>
    </place>
    <place>
      <placeTerm type="text">Bangkok</placeTerm>
    </place>
    <publisher>Asian Institute of Technology</publisher>
    <dateIssued>2001</dateIssued>
    <issuance>continuing</issuance>
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  <language>
    <languageTerm authority="iso639-2b" type="code">eng</languageTerm>
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  <physicalDescription>
    <extent>98, [1] p.</extent>
  </physicalDescription>
  <abstract>In this thesis, we will study about Fuzzy control theory and very high-Speed integrated circuit (VHSIC) hardware description language (VHDL). Then, we will apply Fuzzy control theory into logic level by using VHDL technology.  When VHDL code is compiled, it is necessary to simulate its behavioral function. If the functionality is completely checked out, the VHDL code will be synthesized until all logic blocks are obtained. However, time delay is a major concern in real application. Therefore, it is recommended to test {uFB01}mctional and timing simulation.  When functionality and timing is correct, all logic blocks will be transferred into FPGA chip with PPGA technology. Then, the helicopter heading control will be tested for the operation of the FPGA chip While we are testing the operation of the radio control helicopter, the helicopter{u2019}s nose can maintain at the setting point. Even though we try to disturb its nose, the helicopter tries to keep its position. So, the FPGA chip that has the fuzzy control inside can work properly.</abstract>
  <note>A thesis submitted in partial ful{uFB01}llment of the requirements for the degree of Master of Engineering, School of Advanced Technologies</note>
  <note>Thesis (M.Eng.) - Asian Institute of Technology, 2001</note>
  <subject authority="lcsh">
    <topic>Fuzzy logic</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Robots</topic>
    <topic>Control systems</topic>
  </subject>
  <relatedItem type="series">
    <titleInfo>
      <title>Thesis ; no. ME-01-01</title>
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    <name type="corporate">
      <namePart>Asian Institute of Technology.</namePart>
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    </name>
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  <identifier type="uri">http://203.159.5.9/ait-thesis/detail.php?q=B00128</identifier>
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